The Defense Advanced Research Projects Agency (DARPA) plans to help develop Edge compute for environments with limited power, communication, or physical space.

The Low Resource Computing (LRC) program is designed to support the Department of Defense, and "maximize the utility of alternative computational methods to decouple essential computation from heavy infrastructure overhead."

In procurement documents, DARPA notes that the cutting edge of computing has historically been tied to the limits of power and funding. ENIAC, the world's first programmable, general-purpose, all-electronic digital computer, consumed 150kW and cost a fortune to run.

Today, "modern data centers, built around advanced graphics processing unit (GPU) clusters to drive artificial intelligence, demand staggering, gigawatt-scale power requirements that necessitate massive, dedicated infrastructure."

At the same time, however, there has also been a quiet revolution at the lower end of the scale, where "the physical and financial cost of computation has plummeted so far that it is routinely embedded in disposable novelties." DARPA points t o a standard silicon chip inside a musical greeting card, which "operates at speeds and memory capacities that vastly outperform early mainframes in a package millions of times smaller."

Such a chip costs pennies to make, and is sustained by a coin cell battery that is worth more than it. "The computation itself has become virtually free; the physical resources required to sustain, house, and power it have become the critical bottleneck."

With most of the enterprise compute world focused on pushing the limits of performance, DARPA believes that "there remains substantial room for improvement and innovation by revisiting architectures through a lens of strict resource scarcity."

It adds: "By optimizing systems for extreme efficiency rather than scale, it is possible to develop highly resilient computing platforms that do not rely on massive infrastructure."

LRC expects to focus on existing US technologies that have not been optimized for this concept, as well as nontraditional pathways for enabling micro-computation.

The program is expected to focus on four constrained physical states - low power, low memory, low reliability, and low technological level.

Low power includes nanowatt systems, passive operation, or energy-scavenging architectures. Low memory could include systems with kilobytes or even bytes of memory. Low reliability could involve degrading physical hardware.

As for low technological level, this could include low-precision manufacturing, legacy fabrication, or primitive technological ecosystems. Concepts are also envisioned for extracting computation or data from high-technology artifacts using low-technology tools, such as "a purely optomechanical CD player, a biological antenna array, computational origami techniques for circuit lithography."

Outside of physical hardware, also set to be researched is low trust, low privilege (minimal system access, authorizations, or permissions), self-hosting, and low complexity of user experience.

Incremental improvements to existing commercial processors or standard size, weight, and power (SWAP) are not of interest to the program.

DARPA plans to hold an invitation-only in-person workshop in August 2026 in Hanover, New Hampshire, to review and discuss current and future research relevant to the program. Prospective program members have until July 17 to respond to the RFI and potentially be invited.