Like most chip startups, the inception point for NextSilicon was simply “can we run compute in a different way?”

For Elad Raz, the company’s founder and CEO, the answer was yes, and thus, in late 2017, his company was born.

Raz is an engineer by trade, having previously founded a firm offering professional services in the high-performance computing (HPC), cryptography, and high-performance networking space. That organization was subsequently acquired by Mellanox, with Raz leaving before the networking company was itself acquired by Nvidia in 2020.

In the early days of NextSilicon, Raz says it was mainly him just looking at old attempts at dataflow architecture and asking why it had failed to become a commercial success.

The concept was pioneered by researchers at MIT in the 1970s and early 1980s. Unlike traditional von Neumann or control flow architecture, which executes instructions sequentially, dataflow architecture executes instructions as soon as the required data becomes available, allowing independent operations to be executed in parallel.

With dataflow architecture, proponents say, there is also no shared memory bottleneck, as data is passed between processing nodes when operations are triggered. However, prior attempts to build content-addressable memory (CAM) – a type of memory necessary for accessing certain high-speed searching applications – large enough to hold all the program dependencies have failed.

Raz believes one reason dataflow architecture has never taken off before is because of how the chips are programmed, and if that problem could be solved, the architecture would provide an obvious solution for powering compute-intensive workloads, such as HPC and AI.

“The one thing that I’ve seen with the dataflow architecture is that it’s super hard to program in the right way,” he explains. “That is why dataflow architecture failed, because you never know how the data flows within the algorithm.”

Israel-based NextSilicon was founded based on Raz’s realization that, in parallel software, there is only a small portion of code that runs the majority of the time. “So I thought, what if we invent a processor code that gives love to every instruction the same way?” he says.

It should be noted that hardware that allows you to run operations in parallel is currently available. NextSilicon just thinks its offering is better. GPUs are hindered by the need for specialized programming languages in order to be used most effectively, the company argues, while fully-optimized ASICs designed specifically for individual use cases come with high price tags, long development cycles, and hardware offerings that are largely inflexible.

The solution Raz came up with was to synthesize the workload into something like an FPGA (field-programmable gate array), a type of circuit that can be programmed after manufacturing, and then essentially use trial and error – or, in this case, continuously learning from the mistakes made by the synthesizer and then reconfiguring the chip in response – to discover all the different computational kernels and optimize them in the way that is best for your data.

Making compute intelligent

NextSilicon has called the architecture its accelerators are based on ‘Intelligent Compute,’ describing it as a novel and original computing architecture” that delivers an increased performance-

per-watt when compared to traditional GPUs and high-end CPUs, while simultaneously cutting power consumption and related costs.

The company’s Maverick-2 Intelligent Compute Accelerator (ICA), the chip that has to deliver on this bold claim, was unveiled in October 2024 and is built on TSMC’s 5nm process technology. Available in a single-die PCIe format with 96GB of HBM3e memory and a maximum power consumption of 300W, the dual-die Open Accelerator Module (OAM) offering also uses 5nm process technology but contains 192GB of HBM3e and has a maximum power consumption of 600W.

Designed for workflows that run in HPC and AI environments, the Maverick-2 ICA also supports popular programming languages and requires no code or software stack changes to deploy.

In October 2025, the development of a new RISC-V test chip, dubbed Arbel, was also revealed. While few details regarding that new chip have been released yet – following the initial announcement, NextSilicon said additional details on Arbel benchmarks will be released as progress is made beyond the test-chip phase – Raz says the company is “very proud” of its RISC-V core and that the chip will compete with Intel and AMD upon its release.

One of the challenges with designing custom chips is trying to keep up with the ferocious pace of change currently sweeping through the industry and the growing demand for custom hardware. Earlier this year, an executive from Google said getting specialized architecture from concept to live in production at the speed of light still takes two and a half years, even for the world’s best design and engineering teams. And that’s if you get everything right, which very few do.

Raz acknowledges this and says it is something NextSillicon has had to navigate, noting that the company started designing Maverick three years ago, meaning it needed to estimate where the competition would be almost half a decade into the future – something which he claims, thus far, it has managed to get right.

However, NextSilicon is not the only company currently claiming to be developing a chip that will change the infrastructure landscape. What sets it apart from the rest, Raz claims, is its combined software-hardware play.

“Look at every AI ASIC out there – Nvidia, AMD, Intel, the AI ASIC startups – all of them say: ‘Behold, here is a sophisticated chip! We have something in the hardware that is better, is analog, and has a sophisticated interconnect’,” he says. “Each one has done it, and all of them are saying: ‘We are hardware gurus, we are going to build better hardware than the current leader,’ which, right now, is Nvidia.

“What we are saying is: ‘We have this software-hardware play, and it's an architecture from scratch,’ meaning that if one of those companies wants to go the NextSilicon way, they need to start from the very beginning. To gain configurability, you cannot take a processor code and reconfigure that, you cannot take a tensor code and reconfigure that. So, [what NextSilicon is doing] it's very different.”

The market’s continued desire for software innovation has also been beneficial to the company, given the somewhat daunting pace of change in the hardware market, largely driven by companies like Nvidia and AMD committing to a yearly release cycle for new products.

“No one knows what the next algorithmic approach might be – we already saw a transition from convolutional neural networks to transformer-based models, and we could wake up tomorrow, and there’s the next new thing,” he says. “I think that future proof-capability, so to speak, that we build the foundation around with our software stack, allows us to more easily adapt, and should give us a leg up with customers who want to try something new, but are already a bit nervous around what might come tomorrow from a software innovation perspective, which will always outpace the hardware innovation.”

Conquering HPC

Right now, NextSilicon is all in on the high-performance compute (HPC) business.

Although the decision was made eight years ago to go after the supercomputing industry, Raz says the company is still focusing its efforts on educating the market on its novel architecture approach, as it can be “super hard” for some people who are already accustomed to a particular processor code to understand what it is that NextSilicon is proposing.

“We are writing a lot of technical papers and hoping to explain why this is the future… why it's the only way to get 10x performance per watt on the power consumption.”

Despite scepticism towards its approach from some circles, it hasn’t stopped NextSilicon from securing a number of rather high-profile customers and investors – to date, the company has raised more than $303 million across four funding rounds.

In 2024, NextSilicon announced it had partnered with Sandia National Labs and Penguin Solutions to deliver an Advanced Architecture Prototype System, as part of the lab’s National Nuclear Security Administration (NNSA) platform strategy. At the time, Sandia said it was also planning to build a novel architecture for its Spectra supercomputer using Maverick-2 as part of its Vanguard-II program.

NextSilicon also counts US government departments among its customer base, in addition to a number of unnamed academic research institutions and financial services, energy, manufacturing, and life sciences organizations.

Raz labels those operating in the HPC space as “true early adopters,” adding that the “big machines” the company is building with the US Department of War and various national laboratories is allowing the company to learn a lot about its own scale-out story and how to develop its technology the right way.

“I can show you the seed investment deck I used eight years ago, it says: Conquer HPC, then move to the commercial market with AI/machine learning. And that's exactly where we are now,” he says.

After securing “big wins” in the HPC market, he is confident NextSilicon will be able to do the same when executing the next part of its business plan. The main difference is that for AI and machine learning workloads, you need a lower precision - FP4 or FP8 instead of FP64, for example - and Raz believes this will be the company’s next evolution.

Looking ahead, Raz acknowledges that the company’s customers aren’t about to immediately build a state-of-the-art cloud-scale system using NextSilicon chips in the next three months, but says it is on a journey to get there.

“It's a journey that we are doing together with our partners, and big news is coming,” he says. “We’ve unrolled our chip, and now we are doing like a rolling thunder of news that goes deeper into our technology, which will allow customers to write papers and give testimonials about how they see that progression with NextSilicon.

“We are competing against giants that have been in the market for a long time, but we have something that is so novel and so unique that some of the customers experiment with us, they say: ‘Can I build a cluster that is 10 times faster in terms of performance and power consumption?’ To which we say: ‘Yes!’ It’s a journey, but this is how we are slowly getting there.”