Earlier this year, Victor Peng, the new CEO of semiconductor designer Xilinx, outlined his vision for a "data center first" company in an interview with DCD.
Today, at the Xilinx Developer Forum (XDF), the company expanded upon that vision, unveiling products that it hopes will increase its market share in the cloud, enterprise data center, and artificial intelligence fields.
Speaking at XDF, Peng announced a device called 'Versal,' fitting into a new product category - adaptive compute acceleration platforms (ACAPs). The main idea behind the ACAP architecture - years in the making, with a $1 billion R&D budget - is to embrace heterogeneous computing, with dissimilar coprocessors used to handle different tasks.
Versal will come in six variants; all will have a field programmable gate array (FPGA) at their core, connected to two Arm Cortex-A72s and Cortex-R5s.
The devices will feature 256KB of on-chip memory with ECC, more than 1,900 DSP engines and more than 1.9 million system logic cells, combined with more than 130Mb of UltraRAM, up to 34Mb of block RAM, 28Mb of distributed RAM and 32Mb of new Accelerator RAM blocks.
The Versal series also includes PCIe Gen4 8-lane and 16-lane, and CCIX host interfaces, 32G SerDes, up to four integrated DDR4 memory controllers, up to four multi-rate Ethernet MACs and storage-class memory interfacing.
All of this is interconnected by a network-on-chip (NoC) with up to 28 master/slave ports. The silicon will be manufactured by TSMC using its 7-nanometer FinFET process.
“With the explosion of AI and big data and the decline of Moore’s Law, the industry has reached a critical inflection point. Silicon design cycles can no longer keep up with the pace of innovation,” Peng said.
“Four years in development, Versal is the industry’s first ACAP. We uniquely designed it to enable all types of developers to accelerate their whole application with optimized hardware and software and to instantly adapt both to keep pace with rapidly evolving technology. It is exactly what the industry needs at the exact moment it needs it.”
Also at XDF, Xilinx launched Alveo, a portfolio of accelerator cards for data center servers.
The Alveo U200 and Alveo U250 feature the Xilinx UltraScale+ FPGA, with the company claiming considerable improvements in machine learning inferencing throughput over CPUs. Peng and AMD CTO Mark Papermaster took to the stage at XDF to set a new world record for inference throughput - 30,000 images per second - using eight Alveo U250 cards and two AMD Epyc 7551 server CPUs. The benchmark was performed on GoogleNet (running a batch size of 1 and Int8 precision).
“The launch of Alveo accelerator cards further advances Xilinx’s transformation into a platform company, enabling a growing ecosystem of application partners that can now innovate faster than ever before,” Manish Muthal, vice president of data centers at Xilinx, said.
“We are seeing strong customer interest in Alveo accelerators and are delighted to partner with our application ecosystem to deliver production-deployable solutions based on Alveo to our customers.”
Ravi Pendekanti, SVP of product management and marketing at Dell EMC, added: “FPGA-based acceleration solutions in modern data centers are gaining popularity as accelerators that can be programmed and reprogrammed easily as users see fit."