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Princeton academics create alternative server CPU architecture

Open source Piton project aims to put thousands of cores on a single chip

A team at the University of Princeton has revealed a new type of CPU designed specifically for data centers and able to scale to thousands of cores on a single piece of silicon.

The Piton project – named after a piece of rock climbing gear - promises to lower power consumption while improving performance over traditional x86 processors used in the majority of servers today.

In order to demonstrate the validity of architecture, the university enlisted the help of IBM to print actual physical chips that were demonstrated at the Hot Chips symposium in Cupertino, California.

“What we have with Piton is really a prototype for future commercial server systems that could take advantage of a tremendous number of cores to speed up processing,” said David Wentzlaff, an assistant professor of electrical engineering and associated faculty in the Department of Computer Science at Princeton.

The blueprints for Piton have been contributed to open source, so the technology could eventually be commercialized by mainstream silicon vendors.

Fresh from the oven

Fresh from the oven

Source: Princeton Parallel Group

Years in the making

Piton was developed with hyperscale data centers in mind, able to scale to several thousand cores on a chip, and potentially millions of cores in a distributed system.

The current version of Piton features over 460 million transistors across 25 OpenSPARC T1 cores clocked at 1GHz. It was built with 32 nanometer process on a chip that measures six by six millimeters.

The team at Princeton says the chip was built to exploit commonality among programs running simultaneously on the same piece of silicon, with technologies like execution drafting able to increase energy efficiency by about 20 percent.

Fragment of a Piton chip

Subtle microscopic branding

The team also used something called a ‘memory traffic shaper’ to adjust memory requests from the CPU in real-time, helping improve performance by up to 18 percent when compared to chips that rely on traditional memory allocation.

And finally, Piton can reserve portions of its on-chip cache for individual cores and workloads, something that researchers say can increase efficiency by 29 percent when applied to a 1,024-core architecture.

“With Piton, we really sat down and rethought computer architecture in order to build a chip specifically for data centers and the cloud,” Wentzlaff said.

“The chip we’ve made is among the largest chips ever built in academia and it shows how servers could run far more efficiently and cheaply.”

Primary funding for the project has come from the US National Science Foundation, the Defense Advanced Research Projects Agency (DARPA), and the Air Force Office of Scientific Research.

Readers' comments (1)

  • Looks to me that we are not far from building a "Data Center On Chip".

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