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AMD pitches ARM, x86 and APUs for servers

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Three-pronged attack on Intel in the data center

AMD has come out of the corner fighting after Intel’s Xeon launch this week, with a roadmap for a return to the data center, based on the x86 architecture, ARM based RISC  processors and accelerated processing units (APUs).

The three-pronged attack emerged in an analyst day addressed by CEO Lisa Su and other executives. Alongside laptops, the firm announced three architectures with which it hopes to boost its share of data centers, where it has performed poorly compared to Intel for some time. Of the three, the traditional x86 one looks like being AMD’s favorite, with ARM cores waiting their turn. 

Focus on opportunities - or x86?

“We are focusing our investments on our strongest opportunities” said AMD CEO Lisa Su, explaining that she sees “strong growth opportunities” in data center silicon, which AMD predicts will be worth over $10 billion. Su was appointed in October, and has so far been seen weilding an axe to staff, in a bid to bring costs into line. 

AMD’s Opteron range of server chips includes models with both the traditional x86 architecture and others with using ARM RISC cores. The two are operating side by side, leading to fears that the company will be competing with itself and dividing its market up. This week, AMD announced plans for both sides of the business, but made it clear which side it is favouring.  

The x86 range will get a big upgrade with an entirely new core called Zen, which will be produced in 2016 by a new process called FinFET, at the GlobalFoundries business, which spun out of AMD. 

Zen will replace the Bulldozer core, and offer 40 percent more instructions per clock cycle, AMD CTO Mark Papermaster told the audience. Where Bulldozer used clustered multithreading (CMT), Zen will offer simultaneous multithreading (SMT), a move which is being compared with Intel’s “hyperthreading”.

That move does away with some unusual features of Bulldozer and takes AMD’s x86 range to a more so “traditional” resource layout, according to Anandtech.  Papermaster also promised future Zen+ cores with more improvements. 

ARM delays

There’s also some simplification in the AMD’s ARM camp - along with delays. Zen will get priority, but the ARM-based A1100 Seattle processors will see the light of day, and AMD says it will have a new K12 system on a chip (SoC) design, using the 64-bit ARMv8 core, by 2017.  Beyond that, there aren’t many details about K12.

It shouldn’t be a surprise, but it will disappoint some, that AMD has abandoned its ambitious “Skybridge” plan, an “ambidextrous system design”, last heard of in 2014 which would have seen pin-compatible 20nm ARM and x86 chips sharing the same sockets. These chips were due in 2015 but there’s been no sign of them, so the end of Skybridge has been on the cards for some time. 

Finally, AMD promised a high performance APU unit for data center servers, which will offer multiple teraflops of compute for high performance computing (HPC), using a new memory architecture and improved graphics.

 

 

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